STM32G474 Hardware CRC: Match Write Width and REV_IN Grouping to the Intended Byte Stream

Replacing byte writes with packed word writes can change a hardware CRC even when the application still describes the payload as the same byte array. The missing contract is often the mapping from those bytes to numerical register writes and then through the peripheral’s input bit reversal.

This guide covers the STM32G474 CRC unit in RM0440 Rev 9, March 2025, sections 16.3.3 and 16.4. It is an input-adaptation analysis. No hardware CRC, firmware build or target comparison was executed, and the examples do not select a CRC variant for an unspecified protocol.

Keep three representations visible

Start with an ordered payload byte list. Next record the numeric value and access width of each write to CRC_DR. Finally record how CRC_CR.REV_IN transforms the written value before the CRC engine consumes it.

Those representations cannot be collapsed into a statement such as “the CPU is little-endian.” A byte array’s memory layout helps explain how a native word load would be formed; it does not specify the peripheral’s reversal configuration or prove that a particular driver preserves the intended input sequence.

The manual permits word, right-aligned halfword and right-aligned byte accesses to CRC_DR. Other CRC registers require 32-bit accesses. The width is part of the peripheral transaction, not just the size of the C variable holding a value. Casting the same number to a smaller type is insufficient if the wrapper still performs a full-width register store.

Expand input reversal before comparing checksums

REV_IN controls bit reversal within the selected groups. For the manual’s asymmetric word, the documented transformations are:

written word:          0x1A2B3C4D
REV_IN = 00, unchanged: 0x1A2B3C4D
REV_IN = 01, bytes:     0x58D43CB2
REV_IN = 10, halfwords: 0xD458B23C
REV_IN = 11, word:      0xB23CD458

These values describe transformed input, not four final CRC results. Byte-group reversal reverses bits inside each byte while retaining the byte groups’ positions. Halfword and whole-word grouping move bits across larger boundaries. A software model that implements every setting as a byte swap cannot reproduce this table.

Use the transform table as a diagnostic checkpoint before involving polynomial arithmetic. If the adapter already predicts the wrong transformed word, changing the seed or final XOR merely hides the earlier representation error.

Plan a five-byte feed without inventing tail bytes

The manual explicitly permits processing five bytes with one word write followed by one byte write. That statement establishes supported access sizes. It does not establish that an arbitrary native word load followed by an unchanged reversal setting matches the protocol’s byte order.

Consider the hypothetical payload 1A 2B 3C 4D 5E. An explicit packing convention can name the first numeric word 0x1A2B3C4D; a little-endian native load of those first four memory bytes would instead yield 0x4D3C2B1A. Write down which convention the implementation uses, rather than silently treating those numbers as interchangeable.

The fifth payload byte belongs in a genuine byte-width access. Do not append three zero bytes and submit a second word simply to keep the loop uniform. That would add input to the calculation. Likewise, avoid reading past the buffer or casting an arbitrarily aligned byte pointer to a word pointer.

Before claiming equivalence with five sequential byte writes, derive both feed paths under the intended reversal settings. If the mapping has not been established, retain the simple byte-oriented reference and treat the optimized path as unqualified. A driver API also needs its own pinned contract: a parameter called length may count bytes or larger input units depending on that API.

Freeze the CRC variant while investigating packing

Keep the polynomial, polynomial size, initial value, covered byte range and finalization fixed across the comparison. Preserve the running calculation across writes belonging to one message. Reinitializing halfway through a mixed-width feed would introduce a second, unrelated difference.

Output transformation belongs to another checkpoint. REV_OUT reverses output bits; the manual illustrates 0x11223344 becoming 0x22CC4488. That is not simply exchanging four bytes. Any protocol-specific final XOR and serialization of the final numeric checksum must be defined separately.

Build a representation-focused acceptance set

For a proposed software model, log symbolic access size, numeric value and reversal grouping for payload lengths from one through seven. Use asymmetric bytes so that a reversed group cannot accidentally look unchanged. Include odd tails and several ways of partitioning the same intended sequence.

Then compare a later hardware implementation with an independently specified byte-oriented reference for the exact CRC variant. Save the input mapping alongside each result; a matching checksum for one symmetric pattern is weak evidence of correct packing.

This work leaves hardware comparison pending. Its immediate deliverable is a register-feed contract that explains every input bit and excludes padding, accidental native-endian loads and mislabeled reversal. Only after that contract agrees should a remaining mismatch be assigned to the CRC algorithm or its final representation.