Sensor FIFO Watermarks: Balance Bus Efficiency Against Sample Age
A higher sensor FIFO watermark reduces service frequency by letting more samples accumulate, but it also makes the oldest delivered sample older and leaves fewer slots for scheduling delays. Choose the watermark from both an age budget and an occupancy budget. Then verify that the real drain sequence removes complete samples faster than they arrive.
Applicability: the hardware example is Analog Devices ADXL345, datasheet Revision G, May 2022, using its FIFO or stream mode. Linux v6.12 IIO buffer documentation supplies a separate host-buffer reference. All rates and latencies in the worked example are hypothetical configuration assumptions, not measured performance or guaranteed timing of a board.

1. Identify the queue whose watermark you are changing
The ADXL345 datasheet specifies a 32-level hardware FIFO. FIFO mode stops collecting when full; stream mode retains the newest entries by replacing older ones. The watermark condition remains active until occupancy falls below the configured threshold. Those behaviors lead to different data-loss interpretations.
Do not confuse that hardware threshold with a software buffer’s wakeup threshold. The Linux v6.12 IIO userspace buffer interface defines its own watermark and read/poll behavior. There may be a hardware queue, a kernel queue, and an application queue, each adding residence time. Changing one does not automatically change the others.
Record FIFO mode, effective output data rate, threshold, entry size, interrupt routing, and service policy. Confirm whether one entry contains a complete multi-axis sample or an individual scalar. Express occupancy consistently in entries before converting it to bytes.
2. Calculate oldest-sample age separately from overflow margin
For ideal equally spaced arrivals at rate r, an initially empty FIFO reaches a watermark of W entries when its oldest entry is approximately (W − 1)/r old. Add the delay from threshold crossing to service, the time until that oldest sample becomes available to the consumer, and any downstream queue residence.
In a hypothetical 100-sample-per-second configuration with W = 8, the oldest entry is already 70 ms old at the threshold crossing. Suppose service begins within 15 ms and the batch reaches its consumer within a further 5 ms. The resulting illustrative age budget is 90 ms, before any unmodeled sensor processing or later application delay.
For capacity C, the threshold leaves C − W FIFO slots. At the same hypothetical rate, C = 32 and W = 8 leave 24 slots, equivalent to 240 ms of arrivals. Treat this as a conservative service-budget reference and retain margin; do not schedule service exactly at a full boundary. This calculation credits only the specified FIFO slots, not extra buffering elsewhere in the sensor.
The two tests answer different questions. A batch can be old enough to violate a control requirement while the FIFO still has plenty of space. Conversely, fresh-looking newest samples can hide lost older entries in stream mode.
3. Model arrivals while the bus is draining
At any time, occupancy is the initial count plus arrivals minus successfully removed entries, subject to the selected full-buffer behavior. Use that relationship to analyze the whole service interval. A single calculation at interrupt entry misses samples arriving while the handler waits for the bus or transfers earlier entries.
Estimate service cost from complete transactions, addressing overhead, mandatory intervals, bus arbitration, and software scheduling. Compare sustained removal rate with arrival rate. If service cannot catch up, lowering the watermark only starts an inevitable backlog earlier.
Bound how much work one service pass may perform. A “drain until empty” loop can occupy a shared bus indefinitely when arrivals nearly match removal. A bounded batch or time budget needs a documented rescheduling policy that still satisfies occupancy and age limits. Do not trade a sensor overflow for starvation of another device.
4. Preserve the device’s entry-pop contract
ADXL345 FIFO entries are retrieved through the six data registers at 0x32–0x37. A single-byte read loses the remainder of that entry, so use the documented multi-byte read for the axes required. The datasheet also requires at least 5 µs between the defined end of a data-register read and the next FIFO or FIFO_STATUS read.
Include that device-specific interval in the service calculation. Check the complete serial sequence rather than assuming that one long read through consecutively increasing addresses automatically drains many FIFO entries. The register-address sequence and the queue-pop event are separate facts.
A partially failed entry read needs an explicit policy. The next attempt may no longer refer to the same entry, depending on where the device observed completion. Preserve the error and uncertainty instead of concatenating bytes from two attempts into one plausible sample.
5. Keep sample times honest within each batch
If the device and interface do not provide a verified timestamp for every entry, label reconstructed times as estimates. A host interrupt timestamp anchors an observation of the watermark, not automatically the exact physical conversion instant of each queued sample.
Record rate assumptions, clock tolerance, interrupt latency uncertainty, and the count used to reconstruct order. Sensor filtering can add delay before an output reaches the FIFO. Include that delay when the requirement is physical-event age, rather than merely age since FIFO insertion.
After overflow, reset, or a read failure with uncertain pop behavior, break the continuous timing reconstruction unless another device guarantee restores it. Do not spread one batch timestamp across all entries and imply simultaneous acquisition. Conversely, do not invent a precise sequence number when the hardware exposes only occupancy.
6. Test the selected watermark at its limits
- Threshold crossing: confirm the configured occupancy that asserts the watermark and the drain level that removes it.
- Delayed service: add controlled scheduling or bus delay on a development fixture and compare observed occupancy with the arrival/removal model.
- Full-buffer behavior: verify the chosen FIFO or stream policy and that consumers receive an explicit loss indication when continuity is no longer known.
- Drain interruption: inject a transfer error and require defined handling of incomplete entries and uncertain timestamps.
- Shared-bus load: verify both this sensor’s age limit and the service requirements of competing devices.
Repeat after output-rate, bus-speed, interrupt, or power-management changes. Save threshold-crossing time, service start, each completed entry removal where observable, final occupancy, and consumer delivery time. Those observations distinguish an expensive transaction from late scheduling.
No sensor acquisition or FIFO test was performed for this article. The deliverable is a watermark worksheet with separate age and occupancy margins, a source-checked entry-pop sequence, and delayed-service tests. Choose the largest efficient batch that meets the actual freshness requirement with justified margin, not the largest number that fits in the FIFO.