RISC-V PLIC Diagnostics: Separate Notification Thresholds from Destructive Claims

A PLIC interrupt handler enters, reads its claim register and receives zero. Elsewhere, a diagnostic read returns a real interrupt ID even though the context threshold should suppress notification. Both observations can be consistent with the PLIC contract.

The important distinction is between announcing work, claiming a pending source and telling its gateway that service has finished. These are separate operations, with different effects on shared state.

A threshold controls notification, not every claim

The ratified PLIC 1.0.0 specification describes a per-context threshold: only eligible sources above it generate a notification. The claim operation is explicitly unaffected by that threshold. Software may legally claim even when the context's external-interrupt-pending indication is clear.

For a hypothetical enabled source with priority 3 and context threshold 5, notification is suppressed, but a claim can still return that source's ID if it is pending and wins arbitration. Lowering the threshold is therefore not necessary to explain the successful claim. Priority zero is a separate case: it means that the source never interrupts.

A debugger expression that reads the claim register is not a passive inspection. The read atomically chooses the highest-priority pending source eligible for that target and clears its pending bit. Record the ID from the handler's existing claim rather than adding a second claim to obtain a log value.

A notification does not reserve a source for that context

A source can be enabled for more than one target. The PLIC can notify multiple targets, while the atomic claim allows one of them to acquire that pending request. Another target may then enter its handler and find no claimable source. A notification can also be in flight when the winning claim changes the pending state.

Treat ID zero as the specified no-pending result, not automatically as a corrupt register read. Check the target enable maps and competing claim owners. Conversely, a nonzero claim does not establish that the originally suspected peripheral caused the entry; dispatch using the returned ID.

The specification assigns lower numerical IDs priority when source priorities tie. This is another reason a handler should not infer the acquired source solely from the interrupt it expected to receive.

Preserve the context through completion

Completion writes the acquired source ID back to the context's claim/complete register. The gateway needs that completion before forwarding another request. Clearing a peripheral condition and completing its PLIC request answer different parts of the service sequence.

A particularly subtle failure occurs when teardown disables the source for that context before writing completion. The specification says that a completion for a source not currently enabled for the target is silently ignored. Review interrupt-disable and handler-drain ordering together; do not casually reorder completion after a context's enable bit has been removed.

The PLIC does not verify that a completion ID equals the target's last claimed ID. Software must preserve the actual claim result and the intended context rather than depending on hardware to reject an unrelated ID.

Check the real context map after firmware handoff

The OpenSBI v1.9 PLIC driver indexes a context map for each hart index and privilege context. Its warm initialization programs context enables and thresholds, while cold initialization assigns initial source priorities.

Inspect those handoff values before blaming an operating-system handler. Do not assume that a context ID is a fixed arithmetic function of the architectural hart ID. Platform wiring and the firmware's parsed map determine the relevant register block.

A focused proposed trace records context, source enable, priority, threshold, the single claimed ID and the subsequent completion. It should explain a zero claim without adding destructive reads and show that completion reaches an enabled context. No interrupt controller or target was exercised for this article.