I2C EEPROM Page Writes: Split at the Page Boundary and Wait for Programming Completion

For a Microchip 24LC256, split writes at the physical page boundary, issue STOP to start internal programming, and wait for programming completion before advancing. Bus acknowledgement, readiness for another command, and verified stored data are three different observations. Write protection makes that distinction especially important.

Applicability: this article selects the 24LC256 behavior documented in Microchip DS21203S, 2012. It does not transfer the page size, timing, address format, or write-protect behavior to another EEPROM. Linux v6.12 at24 is a supporting driver example; a custom bus adapter needs its own verified capabilities.

1. Define the page-limited request

The selected datasheet specifies a 64-byte page-write buffer. Writes crossing a physical page boundary wrap within the current page instead of continuing into the next page. A successful bus transfer can therefore store bytes at unintended addresses.

For address a and remaining length n, calculate page_room = 64 − (a modulo 64), then choose the next payload length as the smaller of n, page_room, and the verified host payload capacity. Account separately for control and address bytes when checking adapter limits. Validate the entire requested range before issuing the first write.

A hypothetical six-byte request beginning at 0x003E needs two data bytes at 0x003E–0x003F, followed by four at 0x0040–0x0043. Sending all six in one page command would place the last four at the beginning of the original page. This is address arithmetic, not a measured trace.

2. Treat STOP as a programming transition

After the page data are accepted, STOP initiates the internal write cycle. The device does not acknowledge while that cycle is active. Therefore the function that submits the I2C transfer should not immediately announce that the complete multi-page operation is ready for another dependent access.

Use explicit states: chunk submitted, STOP issued, programming pending, ready for another command, and verified if readback is required. Associate the state with the chunk’s start address and length. An error before STOP and a timeout after STOP have different uncertainty: the latter may occur after programming has already begun.

Keep one owner for a logical write operation. Without serialization, another task can interpret the device’s busy NACK as absence, interleave its own address pointer changes, or start a conflicting request between page chunks. Other devices may still use the bus under the application’s arbitration policy; the EEPROM owner need not monopolize unrelated traffic while waiting.

3. Poll readiness with a bounded policy

DS21203S’s acknowledge-polling procedure sends START and the device control byte with write direction. A NACK indicates that this addressed device may still be programming; ACK permits the next operation. The polling transaction must match the adapter’s supported wire operation, not a guessed zero-length API call.

Record the time of the programming-start STOP and use a monotonic deadline. The datasheet lists a maximum write-cycle time of 5 ms under its specified conditions. The application’s deadline must also account for bus access and scheduling overhead; copying 5 ms directly into an unrelated API timeout does not prove the same bound.

Use a deliberate poll interval or scheduling policy rather than a tight loop that starves the bus. Preserve the last bus error. Arbitration loss, controller timeout, stuck SCL, and an address NACK are different observations and should not all be labeled “EEPROM busy.”

The Linux v6.12 at24 implementation bounds write chunks at page boundaries and retries write access within a configured timeout. That is an implementation example, not a promise that every controller exposes a standalone address-only ACK-poll primitive. Inspect the chosen path before replacing a mature driver with custom polling.

4. Do not mistake write protection for instant success

For the selected device, WP high causes a write command to be acknowledged without programming the array; the device can accept another command immediately. WP is sampled at STOP. Thus immediate readiness can mean either a completed programming cycle or a write that never occurred.

Record the intended WP state and the actual board control path. A software GPIO value is not automatically the voltage at the EEPROM pin. Verify polarity and timing on the approved test fixture. Do not toggle protection casually on a production device containing valuable configuration.

Where the operation requires verification, read back the intended addresses after readiness and compare with the requested bytes. Also check neighboring sentinels in a disposable test region. ACK polling establishes readiness, while readback addresses content. Neither one alone creates an atomic multi-page application transaction.

5. Use boundary and completion fixtures together

1. Page interior: a short write entirely within one page should create one programming cycle.
2. Last page byte: a request beginning at offset 63 with two bytes must split into one byte and one byte.
3. Full aligned page: exactly 64 data bytes beginning on a page boundary need one page command.
4. Unaligned long request: verify every chunk’s address, payload length, STOP, readiness wait, and total byte count.
5. WP asserted: expect acknowledgement without changed content; the integration must not report verified success.
6. Persistent NACK or bus fault: stop at the bounded deadline, retain the uncertain chunk, and do not blindly continue to the next page.

First run chunk arithmetic against a software model with no device writes. Hardware cases require an authorized disposable range and a known restoration plan. Use distinct byte patterns and neighboring sentinels so wrapping cannot hide behind identical values.

6. Report the committed extent honestly

If a multi-page write fails, report which chunks were verified, which were only submitted, and which were never attempted. Do not return the requested total length simply because the first page succeeded. A subsequent retry must use a documented data-integrity policy rather than assuming the uncertain page is unchanged.

Retain the part number, datasheet revision, adapter capability, page size, WP configuration, chunk trace, readiness result, and readback policy. No EEPROM write or ACK-poll loop was executed for this article. Its deliverable is a page-and-programming state machine that distinguishes transfer acceptance, device readiness, and verified content.