STM32G474 FMAC: Port the Filter, Its Scaling and Its Local-Memory Layout Together

A floating-point filter does not become an equivalent STM32G474 FMAC filter by copying its coefficients into a peripheral configuration. The hardware uses bounded fixed-point arithmetic and a small local memory shared by several roles. Numerical behavior and storage layout have to be designed together.

AN5305 Rev 1 provides FIR and IIR examples. RM0440 Rev 9 defines the FMAC registers and operating contract. The examples here are design analysis, not executed filter measurements.

Account for all 256 local-memory words

The FMAC contains 256 words of 16-bit local memory, used for coefficients, state and input/output buffers. This is separate from a coefficient array stored in ordinary MCU RAM.

AN5305's FIR example allocates 51 words to coefficients, 100 to the input buffer and 100 to the output buffer. The total is 251 words, leaving five words outside those allocations. The example is useful because it exposes the whole local-memory budget rather than reporting only the filter's tap count.

Create the corresponding allocation for the actual filter. Record each base, size and algorithmic role, then check that ranges do not overlap or exceed the local memory. Include the history required by the chosen recurrence. Adding a larger application-side DMA buffer does not enlarge the FMAC's local storage.

Treat the application note's sizes as an example, not a universal recommended split. Different filter orders and service patterns need their own valid configuration.

FMAC local memory example with 51 coefficient words, 100 input words, 100 output words and five unallocated words, alongside numeric-scaling and recurrence checks.
Original engineering concept diagram derived from the cited ST documents. No hardware test, electrical measurement or production qualification was performed.

Quantize with an explicit endpoint policy

The documented coefficient format is q1.15, representing values from -1 through 1 minus 2 to the power of -15. Positive one is outside that representable interval.

A conversion routine therefore needs a defined scaling, rounding and out-of-range policy. Multiplying an arbitrary floating-point coefficient by 32768 and casting it is not a complete production conversion contract, particularly at positive one or outside the permitted range.

Preserve the original floating-point coefficients, the normalization factor and the final integer coefficients as separate artifacts. This makes it possible to determine whether a changed response came from filter design, coefficient conversion or runtime configuration.

After quantization, evaluate the implemented filter rather than relying on the unquantized design's response. FIR response error and IIR pole movement are different concerns. The appropriate acceptance test depends on what the filter controls or measures.

IIR normalization must respect the recurrence

AN5305's IIR discussion explains why denominator normalization is restricted to power-of-two factors: the compensation associated with the leading denominator coefficient is implemented through a shift. Scaling the numerator and denominator inconsistently changes the intended gain.

Consequently, do not normalize each coefficient independently simply to fit its magnitude below one. That would change the relationships defining the filter. Derive the supported coefficient and shift representation from the actual recurrence, then evaluate the resulting quantized system.

The note's worked compensator is not a stability guarantee for another controller. A different coefficient set, input range or shift can change internal amplitudes and closed-loop behavior even if every coefficient fits q1.15.

Keep the sign and order conventions used by the selected FMAC function explicit. A mathematically equivalent transfer function written under another convention still needs a deliberate mapping into the hardware's expected coefficient sequence.

Clipping is a behavior to qualify

The FIR configuration in the application note explicitly enables output clipping at the signed 16-bit endpoints. The FMAC's 26-bit accumulator does not make the final 16-bit output unbounded, nor does output clipping prove that every internal arithmetic condition is acceptable.

Define the maximum admitted input and the expected transient behavior. Include impulses, steps and representative worst-case sequences when evaluating the implemented recurrence. If clipping is intentional, state what the consumer may infer from a clipped result. If it is unacceptable, the input range and scaling need to prevent it within the qualified workload.

A smooth-looking average output can conceal brief saturation. Preserve individual results and the relevant error/status evidence during qualification rather than checking only a plotted steady-state response.

Qualify the streaming path after the arithmetic

Once the coefficient representation and memory layout are valid, check how input arrives and output is removed. The DMA and buffer configuration must sustain the required sample schedule without presenting stale state or exhausting local capacity.

Keep numerical comparison separate from streaming diagnosis. A host-side model can evaluate the intended quantized recurrence, while a target experiment is needed to establish actual peripheral configuration, service timing and error handling. Neither result substitutes for the other.

No FMAC execution, DMA transfer or control-loop test was performed for this article. A defensible port delivers four linked artifacts: the original filter, the quantized coefficients and shifts, the nonoverlapping local-memory map, and evidence for the real sample stream. That is the unit of equivalence to review before claiming processor-time savings.

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