Firmware requirements, peripheral integration, task coordination, fault diagnosis and verification for microcontroller products. Start from the actual hardware and acceptance conditions before choosing an implementation.
A higher sensor FIFO watermark reduces service frequency by letting more samples accumulate, but it also makes the oldest delivered sample older and leaves fewer slots for scheduling delays. Choose the watermark from both an age budget and an occupancy budget. Then verify that the real drain sequence removes complete samples faster than they arrive….
A sensor timestamp is meaningful only when it names the event being timed. Conversion start, conversion completion, interrupt handling, bus-read completion, and userspace receipt can all occur at different instants. Establish the physical sampling event first, then trace how the driver attaches a clock reading to that sample. Applicability: the concrete converter reference is Analog…
A reading that improves when sampling slows suggests a timing-dependent error, but it does not identify which timing interval is responsible. Separate the ADC’s acquisition window from the period between conversions, then vary each independently. This distinguishes insufficient input settling from recovery between samples and from unrelated scheduling effects. Applicability: the named hardware reference is…
A smaller I2C pull-up resistor improves a passive RC rise time while increasing the current every low-driving device must sink. Select a resistance interval that satisfies both constraints, including tolerances, and then verify it on the populated bus. A cleaner rising edge alone is not sufficient evidence that the change is safe. Applicability: this method…
A low SCL interval can be a permitted peripheral wait or an expired host limit. Establish both contracts: how the selected device signals “not ready,” and whether the controller actually observes SCL and waits long enough. A valid sensor behavior and a valid controller implementation can still be incompatible when their timing policies differ. Applicability:…
Two devices with the same I2C address need separate visibility, a supported address change, or separate buses. Different software names do not separate electrically connected responders. Choose the topology first, then make branch selection and target access one owned operation. Applicability: this guide uses TI TMP102 address options from SBOS397I and NXP PCA9548A switch behavior…
A register read that requires a repeated START must remain one combined I2C transaction. Write the register selector, issue the repeated START without an intervening STOP, then address the device for reading. Two independently successful API calls do not prove that the controller generated this sequence. Applicability: the concrete device is Bosch Sensortec BMI270 using…
Define user-task memory partitions, object grants and negative tests without overstating MPU isolation.
Close submission races before synchronous cancellation, and distinguish delayable work from queue drain.
Diagnose held-mutex stalls, non-counted suspension and early-resume races using exact FreeRTOS scheduling semantics.