Parallel Hardware Tests Share a Power Supply: Isolate Cross-DUT Interference
If a hardware test fails only when another device starts, treat the shared supply and wiring as test resources that can couple otherwise independent jobs. Compare each device alone with controlled concurrent and staggered activity, while observing voltage at the affected load. A supply’s front-panel reading or nominal current rating does not establish that both boards experienced valid rails.
This is a proposed low-voltage development-bench campaign, informed by Texas Instruments application report SLVA670A, revised May 2015. No rail, current or failure rate was measured. The actual supply, probes, wiring and devices determine permitted voltage, current, grounding and transient conditions.
Map everything shared by the two test lanes
Draw the source, output channels, distribution wiring, connectors, branch switches and return conductors for DUT A and DUT B. Include debug probes, USB cables and instrument grounds. Two independently controlled outputs do not automatically provide galvanic isolation or eliminate a shared return path.
Mark where current is measured and where voltage is sensed. A source-terminal measurement can miss a cable or connector drop at the board. Conversely, an incorrectly connected remote-sense path can change regulation behavior, so follow the instrument’s documented connection method.
Record the supply mode, configured limits, actual wiring and protection behavior. A transient current-limit event may matter even when the time-averaged load is below the displayed limit. Do not increase the limit above the approved fixture or product capability merely to make simultaneous tests pass.
Separate steady load from startup charge
TI’s Managing Inrush Current explains that charging load capacitance during startup or connection can draw current beyond the nominal operating load and disturb a shared rail. Its capacitive term is C multiplied by the rate of voltage change. Operating current, losses and the actual source response still need separate consideration.
That relationship suggests an experiment: keep A’s workload fixed while B enters the relevant startup or load-transition phase. It does not predict the resulting voltage dip without the real capacitance, wiring, source dynamics and load behavior.
Do not copy the application’s measured waveforms or component results into the product’s budget. A controlled slew-rate switch can change startup behavior, but choosing one requires a circuit review and qualification. It is not evidence that existing test lanes are isolated.
Establish single-device baselines
Run A alone through the exact stage that sometimes fails, with B in a documented state. “B idle” and “B disconnected” are different controls. A powered idle board can still consume current or provide an unintended path through another cable.
Then run B alone through the startup or activity suspected of disturbing A. Record its trigger, branch current where safely available, source behavior and voltage at the load. Keep firmware, test stimulus, cabling and acquisition settings fixed between comparable runs.
Define a meaningful A outcome: reset cause, communication completion, analog validity or another requirement-specific result. A software timeout alone cannot distinguish rail disturbance from shared-host scheduling, USB congestion or a test-runner lock.
Run a concurrent-load matrix
| Proposed condition | Purpose | Key evidence |
|---|---|---|
| A active, B absent or in the qualified baseline state. | Establish A’s independent behavior. | A rail, activity marker and result. |
| B starts while A remains active. | Expose coupling at the suspected transition. | B trigger, both load-point rails and A’s first symptom. |
| Same jobs, startup deliberately staggered. | Test sensitivity to overlapping load events. | Actual event separation, not only requested delays. |
| Approved alternative branch wiring or source arrangement. | Narrow the shared electrical path. | Reviewed grounding, unchanged workloads and comparable captures. |
| Equivalent host activity without B’s physical load transition. | Investigate a host/software contribution. | Runner timing and the control’s known differences. |
Keep the sequence and conditions recorded for every run. A successful staggered run supports an overlap-sensitive explanation but does not identify the cause by itself. It could also change host scheduling or communication contention.
Capture the rail where the symptom occurs
Use suitable instrumentation at the DUT supply and return points, with bandwidth and triggering appropriate to the suspected event. Confirm probe ratings, loading and ground connections before energizing the setup. Never attach an earth-referenced probe ground where it would short a floating or driven node.
Capture a common event marker alongside the voltage observation and firmware result when practical. Keep clock alignment uncertainty visible. A log printed after a reset may describe an earlier event, so host receipt time is a weak substitute for a physical marker.
Record the actual voltage trajectory against the device’s specified operating and reset conditions. A visible dip is not automatically a violation, while a brief violation can be missed by a slow display. Where evidence is insufficient, report that limitation instead of asserting that power was good.
Choose the remedy from the observed path
If the shared source or distribution path is implicated, the options may include qualified wiring changes, a reviewed branch design, revised startup sequencing or reduced parallelism. Select among them using the product and fixture limits, not an assumed universal current margin.
If only host timing changes while the measured rails remain within the qualified observation scope, investigate software and transport contention. That does not prove every unobserved electrical condition is harmless; it simply redirects the next controlled test.
Do not add large capacitance as an unreviewed cure. It can improve one transient while increasing startup charge demand. Similarly, separate supplies can introduce new grounding and back-power paths when the devices still share communication cables.
Make the shared supply visible to the scheduler
Represent the source or qualified power group as a shared resource in the test plan. If only certain transitions are incompatible, serialize those transitions explicitly; if the full concurrent envelope is unqualified, reserve the group exclusively until it is characterized.
The NASA verification handbook calls for recording test configuration, equipment and conditions. For this campaign, retain the power topology and concurrency schedule alongside each result so a future station change cannot silently invalidate the comparison.
Acceptance requires repeatable evidence that the permitted job combinations preserve each DUT’s required supply conditions and functional outcomes. The deliverable is a concurrent-load matrix and an enforceable resource policy. Faster test throughput is useful only when one lane cannot invalidate another lane’s evidence.
